A conventional voltage booster circuit is supplied with a single power supply as an external power source. If a voltage more than twice as high as that generated by the external power source is required, an arrangement such as a voltage tripler is used. If the voltage supplied by an external power source is relatively high, the entire voltage booster circuit is formed by a transistor having a relatively thick gate oxide film (see Japanese Patent Laid-Open No. 2001-250381, for example).
It is difficult for a conventional voltage booster circuit, which is supplied with one power supply as an external power source, to provide a sufficient supply capacity if the voltage of the external power source is low. Although a required voltage can be achieved by using a voltage-tripler, the efficiency of current conversion will be significantly reduced.
If the voltage of the external power source is adequately high, then the entire voltage booster circuit must be formed with a transistor having a relatively thick gate oxide film, which takes up more circuit space. Furthermore, if the voltage of the external power source is sufficiently high, the voltage can be boosted to a value that the transistors that form the circuit cannot withstand, and consequently the life of the product may be reduced.
The present invention solves the problems associated with the prior art and an object of the present invention is to provide an arrangement capable of using a plurality of power sources to supply an adequate voltage to a system-on-chip (SOC), which is a large-scale semiconductor integrated circuit, without increasing circuit space.
Another object of the present invention is to provide an arrangement that can avoid overboost beyond the withstand voltage of transistors if an external voltage is higher than necessary.